Q&A#06- How can I generate a new clock from a reference clock?
1 mar 2019 ·
10 min. 37 sec.
![Q&A#06- How can I generate a new clock from a reference clock?](https://d3wo5wojvuv7l.cloudfront.net/t_square_limited_480/images.spreaker.com/original/d9e685a3ec101e4bed7a4cb0242a3a18.jpg)
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Descrizione
I receiver a question from Sandip. He got my reference, from my post on DDS. The question is: “I want to generate Square of 999kHz, 1000kHz and 1001kHzin VHDL Language...
mostra di più
I receiver a question from Sandip. He got my reference, from my post on DDS.
The question is:
“I want to generate Square of 999kHz, 1000kHz and 1001kHzin VHDL Language and that would be implemented on a Zynq ZC702 evaluation board.
Is it possible by using the DDS.? Can you provide your expertise and comment on it.”
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
mostra meno
The question is:
“I want to generate Square of 999kHz, 1000kHz and 1001kHzin VHDL Language and that would be implemented on a Zynq ZC702 evaluation board.
Is it possible by using the DDS.? Can you provide your expertise and comment on it.”
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: podcast@surf-vhdl.com
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
Informazioni
Autore | Francesco Richichi |
Sito | - |
Tag |
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